Programme Element: ARTES 5.1
Reference nr.: 13.1TT.37
Planned Tender Issue: quarter 2, 2013
Objective: The goal is to develop a switchable VCO bank covering the 1.25 to 3.3 GHz range with a low VCO tuning sensitivity (10 to 15 MHz/V at 2.5V) and low phase noise (-86 dBc @ 10 KHz , -116 dBc/Hz @ 100 KHz, -140 dBc/Hz @ 1 MHz).
Targeted Improvements: A switchable VCO bank covering the 1.25 to 3.3 GHz frequency range with a low individual VCO tuning sensitivity and low phase noise will bring the phase noise performance of flexible Ku-band frequency converters to the same level as their fixed frequency counterparts.
Description:
SiGe technology provides low 1/f noise devices that are used in low phase noise VCO's.
Using an off-chip wide-band VCO compatible with existing fractional division synthesizer chips avoids the coupling phenomenon experienced in frequency synthesizers with embedded VCO's, thereby improving the spurious performance.
In order to cover a wide frequency range with low tuning voltage and low tuning sensitivity a switchable bank of VCO's and an adaptive frequency control block (AFC) are required.
Work Logic:
Phase 1: Simulation of a switched capacitor bank VCO architecture in space qualified SiGe technology that achieves the targeted requirements.
Interfacing with existing fractional division synthesizers should be taken into account in order to allow for closed loop performance verification in the second phase. Prototyping of one VCO type to validate the modelling is highly encouraged.
Phase 2: Manufacturing of the switched capacitor VCO bank, open loop verification as well as verification in a complete PLL in a representative environment.
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